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d a t a sh eet product speci?cation file under integrated circuits, ic01 2001 jan 17 integrated circuits UDA1361TS 96 khz sampling 24-bit stereo audio adc
2001 jan 17 2 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS features general low power consumption 256, 384, 512 and 768f s system clock 2.4 to 3.6 v power supply supports sampling frequency of 5 to 110 khz small package size (ssop16) integrated high-pass filter to cancel dc offset power-down mode supports 2 v (rms) input signals easy application master or slave operation. multiple format output interface i 2 s-bus and msb-justified format compatible up to 24 significant bits serial output. advanced audio con?guration stereo single-ended input configuration high linearity, dynamic range and low distortion. general description the UDA1361TS is a single chip stereo analog-to-digital converter (adc) employing bitstream conversion techniques. the low power consumption and low voltage requirements make the device eminently suitable for use in low-voltage low-power portable digital audio equipment which incorporates recording functions. the UDA1361TS supports the i 2 s-bus data format and the msb-justified data format with word lengths of up to 24 bits. ordering information type number package name description version UDA1361TS ssop16 plastic shrink small outline package; 16 leads; body width 4.4 mm sot369-1
2001 jan 17 3 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS quick reference data symbol parameter conditions min. typ. max. unit supplies v dda analog supply voltage 2.4 3.0 3.6 v v ddd digital supply voltage 2.4 3.0 3.6 v i dda analog supply current f s = 48 khz operating mode - 10.5 - ma power-down mode - 0.5 - ma i ddd digital supply current f s = 48 khz operating mode - 3.5 - ma power-down mode - 0.45 - ma t amb ambient temperature - 40 - +85 c analog v i(rms) input voltage (rms value) at 0 db(fs) equivalent - 1.1 - v at - 1 db(fs) signal output - 1.0 - v (thd + n)/s total harmonic distortion-plus-noise to signal ratio f s = 48 khz at - 1db -- 88 - 83 db at - 60 db; a-weighted -- 40 - 34 db f s = 96 khz at - 1db -- 85 - 80 db at - 60 db; a-weighted -- 40 - 37 db s/n signal-to-noise ratio v i = 0 v; a-weighted f s = 48 khz - 100 - db f s = 96 khz - 100 - db a cs channel separation - 100 - db
2001 jan 17 4 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS block diagram handbook, full pagewidth UDA1361TS mgt451 1 v inl adc sd digital interface dc-cancellation filter decimation filter clock control 3 16 v inr adc sd 13 datao 11 bck 12 ws 6 sfor 7 pwon 14 mssel 15 10 v ssd 9 v ddd v ssa 5 v rp 4 v rn 2 v ref 8 sysclk v dda fig.1 block diagram. pinning symbol pin description v inl 1 left channel input v ref 2 reference voltage v inr 3 right channel input v rn 4 negative reference voltage v rp 5 positive reference voltage sfor 6 data format selection input pwon 7 power control input sysclk 8 system clock 256, 384, 512 or 768f s v ddd 9 digital supply voltage v ssd 10 digital ground bck 11 bit clock input/output ws 12 word select input/output datao 13 data output mssel 14 master/slave select v ssa 15 analog ground v dda 16 analog supply voltage handbook, halfpage UDA1361TS mgt452 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v inl v ref v inr v rn v rp sfor pwon sysclk v ddd v ssd bck ws datao mssel v ssa v dda fig.2 pin configuration.
2001 jan 17 5 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS functional description system clock the UDA1361TS accommodates master and slave modes. the system devices must provide the system clock regardless of master or slave mode. in the master mode a system clock frequency of 256f s is required. in the slave mode a system frequency of 256, 384, 512 or 768f s is automatically detected (for a system clock of 768f s the sampling frequency must be limited to 55 khz). the system clock must be locked in frequency to the digital interface input signals. input level the overall system gain is proportional to v dda , or more accurately the potential difference between the reference voltages v vrp and v vrn . the - 1 db input level at which thd + n/s is specified corresponds to - 1 db(fs) digital output (relative to the full-scale swing). with an input gain switch, the input level can be calculated as follows: at 0 db gain: at 6 db gain: in applications where a 2 v (rms) input signal is used, a 12 k w resistor must be connected in series with the input of the adc. this forms a voltage divider together with the internal adc resistor and ensures that only 1 v (rms) maximum is input to the ic. using this application for a 2 v (rms) input signal, the gain switch must be set to 0 db. when a 1 v (rms) input signal is input to the adc in the same application the gain switch must be set to 6 db. an overview of the maximum input voltage allowed against the presence of an external resistor and the setting of the gain switch is given in table . the power supply voltage is assumed to be 3 v. table 1 application modes using input gain stage multiple format output interface the serial interface provides the following data output formats in both master and slave modes (see figs 3, 4 and 5). i 2 s-bus with data word length of up to 24 bits msb-justified serial format with data word length of up to 24 bits. the master mode drives pins ws (word select; 1f s ) and bck (bit clock; 64f s ). ws and bck are received in slave mode. table 2 master/slave select table 3 select data format decimation ?lter the decimation from 64f s is performed in two stages. the first stage realizes a 4th-order sinx/x characteristic. this filter decreases the sample rate by 8. the second stage, a fir filter, consists of 3 half-band filters, each decimating by a factor of 2. v i 1 db C () v vrp v vrn C 3 ---------------------------------- v (rms) == v i 1 db C () v vrp v vrn C 23 ---------------------------------- v (rms) == resistor (12 k w ) input gain switch maximum input voltage (rms) present 0 db 2 v present 0 db 1 v absent 0 db 1 v absent 6 db 0.5 v mssel master/slave select l slave mode h master mode m (reserved for digital test) sfor data format li 2 s-bus data format h msb-justi?ed data format m (reserved for analog test)
2001 jan 17 6 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS table 4 decimation ?lter characteristic dc cancellation ?lter a iir high-pass filter is provided to remove unwanted dc components. the filter characteristics are given in table 5. table 5 dc cancellation ?lter characteristic mute on recovery from power-down, the serial data output datao is held low until valid data is available from the decimation filter. this time tracks with the sampling frequency: , t = 256 ms when f s = 48 khz. power-down mode/input voltage control the pwon pin can control the power saving together with the optional gain switch for 2 or 1 v (rms) input. the UDA1361TS supports 2 v (rms) input using a series resistor of 12 k w . for the definition of the pin settings for 1 or 2 v (rms) mode, it is assumed that this resistor is present as a default component. table 6 power-down/input voltage control item condition value (db) pass-band ripple 0 to 0.45f s 0.01 pass-band droop 0.45f s - 0.2 stop band >0.55 f s - 70 dynamic range 0 to 0.45 f s >135 item condition value (db) pass-band ripple - none pass-band gain - 0 droop at 0.00045f s - 0.031 attenuation at dc at 0.00000036f s >40 dynamic range 0 to 0.45f s >135 pwon power-down or gain l power-down mode m 0 db gain h 6 db gain t 12288 f s ---------------- = serial interface formats handbook, full pagewidth mgt453 msb-justified format ws left right 3 2 1 3 2 1 msb b2 msb lsb lsb msb b2 b2 3 8 3 8 bck data ws left right 3 2 1 3 2 1 msb b2 msb lsb lsb msb b2 3 8 3 8 bck data input format i 2 s-bus fig.3 serial interface formats.
2001 jan 17 7 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. all supply connections must be made to the same power supply. 2. esd behaviour is tested in accordance with jedec ii standard: a) human body model (hbm); equivalent to discharging a 100 pf capacitor through a 1.5 k w series resistor. b) machine model (mm); equivalent to discharging a 200 pf capacitor through a 0.75 m h series inductor. thermal characteristics dc characteristics v ddd =v dda =3v; t amb =25 c; all voltages referenced to ground (pins 10 and 15); unless otherwise speci?ed. symbol parameter conditions min. max. unit v dd supply voltage note 1 - 4.0 v t xtal(max) maximum crystal temperature - 150 c t stg storage temperature - 65 +125 c t amb ambient temperature - 40 +85 c v es electrostatic handling voltage hbm; note 2 - 3000 +3000 v mm; note 2 - 300 +300 v symbol parameter conditions value unit r (th j-a) thermal resistance from junction to ambient in free air 130 k/w symbol parameter conditions min. typ. max. unit supplies v dda analog supply voltage 2.4 3.0 3.6 v v ddd digital supply voltage 2.4 3.0 3.6 v i dda analog supply current f s = 48 khz operating mode - 10.5 - ma power-down mode - 0.5 - ma f s = 96 khz operating mode - 10.5 - ma power-down mode - 0.5 - ma i ddd digital supply current f s = 48 khz operating mode - 3.5 - ma power-down mode - 0.45 - ma f s = 96 khz operating mode - 7.0 - ma power-down mode - 0.65 - ma
2001 jan 17 8 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS note 1. all power supply connections must be connected to the same external power supply unit. digital input pin (sysclk) v ih high-level input voltage 2.0 - 5.5 v v il low-level input voltage - 0.5 - +0.8 v | i li | input leakage current -- 1 m a c i input capacitance -- 10 pf digital 3-level input pins (pwon, sfor, mssel) v ih high-level input voltage 0.9v dd - v dd + 0.5 v v im middle-level input voltage 0.4v dd - 0.6v dd v v il low-level input voltage - 0.5 - +0.4 v digital input/output pins (bck, ws) v ih high-level input voltage 2.0 - 5.5 v v il low-level input voltage - 0.5 - +0.8 v | i li | input leakage current -- 1 m a c i input capacitance -- 10 pf v oh high-level output voltage i oh = - 2 ma 0.85v ddd -- v v ol low-level output voltage i ol =2ma -- 0.4 v digital output pin (datao) v oh high-level output voltage i oh = - 2 ma 0.85v ddd -- v v ol low-level output voltage i ol =2ma -- 0.4 v analog v ref reference voltage with respect to v ssa 0.45v dda 0.5v dda 0.55v dda v r i input resistance - 12 - k w c i input capacitance - 20 - pf symbol parameter conditions min. typ. max. unit
2001 jan 17 9 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS ac characteristics (analog) v ddd =v dda =3v; f i = 1 khz; t amb =25 c; all voltages referenced to ground (pins 10 and 15); unless otherwise speci?ed. symbol parameter conditions typ. max. unit v i(rms) input voltage (rms value) at 0 db(fs) equivalent 1.1 - v at - 1 db(fs) signal output 1.0 - v ?d v i ? unbalance between channels <0.1 0.4 db (thd + n)/s total harmonic distortion-plus-noise to signal ratio f s = 48 khz at - 1db - 88 - 83 db at - 60 db; a-weighted - 40 - 34 db f s = 96 khz at - 1db - 85 - 80 db at - 60 db; a-weighted - 40 - 37 db s/n signal-to-noise ratio v i = 0 v; a-weighted f s = 48 khz 100 - db f s = 96 khz 100 - db a cs channel separation 100 - db psrr power supply rejection ratio f ripple = 1 khz; v ripple = 30 mv (p-p) 30 - db
2001 jan 17 10 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS ac characteristics (digital) v ddd =v dda = 2.4 to 3.6 v; t amb = - 40 to +85 c; all voltages referenced to ground (pins 10 and 15); unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit system clock timing t sys system clock cycle f sys = 256f s 35 88 780 ns f sys = 384f s 23 59 520 ns f sys = 512f s 17 44 390 ns f sys = 768f s 17 30 260 ns t cwl low-level system clock pulse width 0.40t sys - 0.60t sys ns t cwh high-level system clock pulse width 0.40t sys - 0.60t sys ns serial data timing t cy(clk)(bit) bit clock period ; master mode 64f s 64f s 64f s hz ; slave mode -- 64f s hz t bckh bit clock high time 50 -- ns t bckl bit clock low time 50 -- ns t r rise time -- 20 ns t f fall time -- 20 ns t d(o)(d)(bck) data output delay time (from bck falling edge) -- 40 ns t d(o)(d)(ws) data output delay time (from ws edge) msb-justi?ed format -- 40 ns t h(o)(d) data output hold time 0 -- ns t r(ws) word select rise time -- 20 ns t f(ws) word select fall time -- 20 ns f ws word select period 111f s t d(ws)(bck) word select delay from bck master mode - 40 - +40 ns t su(ws) word select set-up time slave mode 20 -- ns t h(ws) word select hold time slave mode 10 -- ns f cy 1 t cy ------- - = f cy 1 t cy ------- - =
2001 jan 17 11 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS handbook, full pagewidth mgt454 t d(o)(d)(bck) t d(ws)(bck) t cy(clk)(bit) ws bck datao t h(o)(d) t f t bckh t bckl t r fig.4 serial interface master mode timing. handbook, full pagewidth mgt455 t h(ws) t su(ws) t d(o)(d)(bck) t d(o)(d)(ws) t h(o)(d) t bckl t cy(clk)(bit) ws bck datao t f t bckh t r fig.5 serial interface slave mode timing.
2001 jan 17 12 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS application information the application information illustrated in fig.6, is an optimum application environment. simplification is possible at the cost of some performance degradation. handbook, full pagewidth v ddd x4-1 5 6 4 3 2 116 15 14 13 12 11 10 9 mgu297 x5 x6 7 UDA1361TS r12 47 k w 1n (63 v) c11 47 m f (16 v) r13 47 k w x4-2 x4-3 v ddd x2-1 r4 47 k w r5 47 k w x2-2 x2-3 v ddd v ddd v dda x3-1 r7 47 k w r6 47 k w x3-2 x1-1 x1-4 x1-2 x1-3 x1-5 x1-6 x1-7 x1-9 x1-10 x1-8 x3-3 v dda v dda 8 vd r10 47 w sysclk r11 47 w l1 blm32a07 l2 blm32a07 1n (63 v) 47 m f (16 v) c3 47 m f (16 v) c4 47 m f (16 v) c1 100 m f (16 v) c2 100 m f (16 v) c5 47 m f (16 v) c8 100 nf (63 v) c9 100 nf (63 v) c6 47 m f (16 v) c10 100 nf (63 v) c7 100 nf (63 v) c12 r1 220 w r3 1 w r2 1 w fig.6 application diagram. the capacitors at the input of the adc can be reduced. it should be noted that the cut-off frequency of the capacitor with the 12 kw input resistance of the adc will also change.
2001 jan 17 13 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS package outline unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.15 0.00 1.4 1.2 0.32 0.20 0.25 0.13 5.30 5.10 4.5 4.3 0.65 6.6 6.2 0.65 0.45 0.48 0.18 10 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.20 mm maximum per side are not included. 0.75 0.45 1.0 sot369-1 mo-152 95-02-04 99-12-27 w m q a a 1 a 2 b p d y h e l p q detail x e z e c l v m a x (a ) 3 a 0.25 18 16 9 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 4.4 mm sot369-1 a max. 1.5
2001 jan 17 14 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2001 jan 17 15 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
2001 jan 17 16 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS data sheet status note 1. please consult the most recently issued data sheet before initiating or completing a design. data sheet status product status definitions (1) objective speci?cation development this data sheet contains the design target or goal speci?cations for product development. speci?cation may change in any manner without notice. preliminary speci?cation quali?cation this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. product speci?cation production this data sheet contains ?nal speci?cations. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2001 jan 17 17 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS notes
2001 jan 17 18 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS notes
2001 jan 17 19 philips semiconductors product speci?cation 96 khz sampling 24-bit stereo audio adc UDA1361TS notes
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 2001 71 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, marketing communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: philips hungary ltd., h-1119 budapest, fehervari ut 84/a, tel: +36 1 382 1700, fax: +36 1 382 1800 india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, via casati, 23 - 20052 monza (mi), tel. +39 039 203 6838, fax +39 039 203 6800 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland : al.jerozolimskie 195 b, 02-222 warsaw, tel. +48 22 5710 000, fax. +48 22 5710 001 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 5f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2451, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 60/14 moo 11, bangna trad road km. 3, bagna, bangkok 10260, tel. +66 2 361 7910, fax. +66 2 398 3447 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 3341 299, fax.+381 11 3342 553 printed in the netherlands 753503/01/pp 20 date of release: 2001 jan 17 document order number: 9397 750 07157

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